VLSI CAD Part II: Layout

Before you start this course, please complete VLSICAD Part 1: Logic.

Modern VLSI chips are incredibly complex. They contain billions of transistors and millions of logic gates that can be used for computation and control. There are also large blocks of memory and embedded blocks with pre-designed functions created by third parties. These blocks are called "intellectual property" (or IP blocks). How does one design such complex chips? Answer: A sequence of computer-aided design (CAD), tools creates an abstract description of the chip and refines it step by step to create a final design. This course focuses on the main design tools that are used to create an Application Specific Integrated Circuit or System on Chip (SoC). This section of the course focuses on key logical representations and geometric representations. They make it possible to map logic from layout to layout and, in particular, to place and route large logic networks. Students will learn how tools work at the level their data structures and algorithms. Technology mapping, timing analysis, ASIC placement, routing, and other topics will be covered.

Recommendation:

Programming experience (C, C++, Java, Python, etc.) Basic knowledge of data structures, algorithms (particularly recursive algorithms) and programming experience. Basic digital design knowledge: Boolean algebra and Kmaps. Calculus and linear algebra at the level of junior or senior engineers. Basic knowledge of RC-linear circuits (at least at the level of an introductory physics course).